Linux 5.3 Could Finally See FSGSBASE – Performance Improvements Back To Ivybridge


INTEL --

The FSGSBASE instruction set has been present on Intel processors going back to Ivy Bridge processors and while there have been Linux kernel patches for this feature going on for years, it looks like with the Linux 5.3 kernel cycle is this support for merging. Making us eager for this support is the prospect of better performance, especially for context switching workloads that already have been suffering as a result of recent CPU mitigations.

The FSGSBASE instructions allow for reading/writing FS/GS BASE from any privilege. But the short story is there should be performance benefits from FSGSBASE in context switching thanks to skipping an MSR write for GSBASE. User-space programs like Java are also expected to benefit in being able to avoid system calls for editing the FS/GS BASE.

Among the reasons the code has been delayed in previous years is that user-space can do stupid stuff, “The major disadvantage is that user code can use the new instructions. Now userspace is going to do totally stupid shite like writing some nonzero value to GS and then doing WRGSBASE or like linking some idiotic library that uses WRGSBASE into a perfectly innocent program like dosemu2 and resulting in utterly nonsensical descriptor state.

Considering all the performance hits we’ve seen the past year and a half from the likes of Meltdown and Zombieload, hearing of better context switching performance on an instruction set present since Ivybridge is certainly promising.

The FSGSBASE patches have been revised over the years on the mailing list while now the patches landed in WIP.x86/cpu maintained by Thomas Gleixner. Given this milestone, it’s looking quite likely we’ll see this x86 CPU improvement land with the upcoming Linux 5.3 merge window — barring any last minute objections. That next cycle is kicking off in early July.

Those wishing to learn more about the technical details can see the new documentation.